In various nonvolatile storage systems, data is stored in memory cells that can be programmed to multiple predefined programming levels. Typically, writing data to the memory is carried out by applying multiple programming pulses to the memory cells, in an attempt to charge the memory cells to the appropriate programming levels. Methods for programming nonvolatile memories are known in the art. For example, U.S. Pat. No. 8,427,871, whose disclosure is incorporated herein by reference, describes a nonvolatile memory device that performs a program operation comprising applying a program pulse to selected memory cells, detecting a number of fail bits among the selected memory cells, the fail bits comprising failed program bits and disturbed inhibit bits, and determining a program completion status of the program operation based on the number of detected fail bits.
Some types of memory devices support parallel programming of memory cells in multiple planes. For example, U.S. Pat. No. 8,031,525, whose disclosure is incorporated herein by reference, describes a flash memory device that includes a voltage generator circuit configured to generate a program voltage, a pass voltage, and a high voltage. The memory device includes a plurality of planes configured to perform a program operation in response to the program, pass, and high voltages and to verify the program operation, respectively, and control logic configured to control the planes in response to verification results from the planes, wherein the control logic controls the planes so as to interrupt the program and pass voltages or the high voltage from being applied to program-passed planes.